/* USER CODE BEGIN Header */ /** ****************************************************************************** * @file : main.c * @brief : Main program body ****************************************************************************** * @attention * * Copyright (c) 2024 STMicroelectronics. * All rights reserved. * * This software is licensed under terms that can be found in the LICENSE file * in the root directory of this software component. * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ /* USER CODE END Header */ /* Includes ------------------------------------------------------------------*/ #include "main.h" #include "cmsis_os.h" #include "fatfs.h" #include "lwip.h" /* Private includes ----------------------------------------------------------*/ /* USER CODE BEGIN Includes */ #include #include #include "lwip/api.h" #include "lwftpc.h" /* USER CODE END Includes */ /* Private typedef -----------------------------------------------------------*/ /* USER CODE BEGIN PTD */ /* USER CODE END PTD */ /* Private define ------------------------------------------------------------*/ /* USER CODE BEGIN PD */ /* USER CODE END PD */ /* Private macro -------------------------------------------------------------*/ /* USER CODE BEGIN PM */ /* USER CODE END PM */ /* Private variables ---------------------------------------------------------*/ FDCAN_HandleTypeDef hfdcan1; FDCAN_HandleTypeDef hfdcan2; FDCAN_HandleTypeDef hfdcan3; SD_HandleTypeDef hsd1; TIM_HandleTypeDef htim3; UART_HandleTypeDef huart4; UART_HandleTypeDef huart7; UART_HandleTypeDef huart8; DMA_HandleTypeDef hdma_uart8_rx; MDMA_HandleTypeDef hmdma_mdma_channel0_sdmmc1_end_data_0; osThreadId defaultTaskHandle; uint32_t defaultTaskBuffer[ 4096 ]; osStaticThreadDef_t defaultTaskControlBlock; osThreadId debugTaskHandle; uint32_t debugTaskBuffer[ 2048 ]; osStaticThreadDef_t debugTaskControlBlock; /* USER CODE BEGIN PV */ #define FTPSemaphore 0 static lwftp_session_t s; sys_sem_t ftpsem; uint8_t CLI_IP[4] = { 192, 168, 0, 120 }; // client addr uint8_t SVR_IP[4] = { 192, 168, 0, 100 }; // server addr u16_t SVR_PORT = 21; char *USER = "anonymous"; char *PASS = "email@example.com"; /* USER CODE END PV */ /* Private function prototypes -----------------------------------------------*/ void SystemClock_Config(void); static void MPU_Config(void); static void MX_GPIO_Init(void); static void MX_DMA_Init(void); static void MX_MDMA_Init(void); static void MX_FDCAN3_Init(void); static void MX_SDMMC1_SD_Init(void); static void MX_TIM3_Init(void); static void MX_UART4_Init(void); static void MX_UART7_Init(void); static void MX_FDCAN1_Init(void); static void MX_FDCAN2_Init(void); static void MX_UART8_Init(void); void StartDefaultTask(void const * argument); void StartDebugTask(void const * argument); /* USER CODE BEGIN PFP */ // Function to send the data to the server void lwftp_init(void); /* USER CODE END PFP */ /* Private user code ---------------------------------------------------------*/ /* USER CODE BEGIN 0 */ int _write(int32_t file, uint8_t *ptr, int32_t len) { for (int32_t i = 0; i < len; ++i) ITM_SendChar(*ptr++); return len; } /* USER CODE END 0 */ /** * @brief The application entry point. * @retval int */ int main(void) { /* USER CODE BEGIN 1 */ /* USER CODE END 1 */ /* MPU Configuration--------------------------------------------------------*/ MPU_Config(); /* Enable the CPU Cache */ /* Enable I-Cache---------------------------------------------------------*/ SCB_EnableICache(); /* Enable D-Cache---------------------------------------------------------*/ SCB_EnableDCache(); /* MCU Configuration--------------------------------------------------------*/ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ HAL_Init(); /* USER CODE BEGIN Init */ /* USER CODE END Init */ /* Configure the system clock */ SystemClock_Config(); /* USER CODE BEGIN SysInit */ /* USER CODE END SysInit */ /* Initialize all configured peripherals */ MX_GPIO_Init(); MX_DMA_Init(); MX_MDMA_Init(); MX_FDCAN3_Init(); MX_SDMMC1_SD_Init(); MX_TIM3_Init(); MX_UART4_Init(); MX_UART7_Init(); MX_FDCAN1_Init(); MX_FDCAN2_Init(); MX_FATFS_Init(); MX_UART8_Init(); /* USER CODE BEGIN 2 */ #define RTOS_MODE 1 #if RTOS_MODE /* USER CODE END 2 */ /* USER CODE BEGIN RTOS_MUTEX */ /* add mutexes, ... */ /* USER CODE END RTOS_MUTEX */ /* USER CODE BEGIN RTOS_SEMAPHORES */ /* add semaphores, ... */ /* USER CODE END RTOS_SEMAPHORES */ /* USER CODE BEGIN RTOS_TIMERS */ /* start timers, add new ones, ... */ /* USER CODE END RTOS_TIMERS */ /* USER CODE BEGIN RTOS_QUEUES */ /* add queues, ... */ /* USER CODE END RTOS_QUEUES */ /* Create the thread(s) */ /* definition and creation of defaultTask */ osThreadStaticDef(defaultTask, StartDefaultTask, osPriorityNormal, 0, 4096, defaultTaskBuffer, &defaultTaskControlBlock); defaultTaskHandle = osThreadCreate(osThread(defaultTask), NULL); /* definition and creation of debugTask */ osThreadStaticDef(debugTask, StartDebugTask, osPriorityNormal, 0, 2048, debugTaskBuffer, &debugTaskControlBlock); debugTaskHandle = osThreadCreate(osThread(debugTask), NULL); /* USER CODE BEGIN RTOS_THREADS */ /* add threads, ... */ /* USER CODE END RTOS_THREADS */ /* Start scheduler */ osKernelStart(); /* We should never get here as control is now taken by the scheduler */ /* Infinite loop */ /* USER CODE BEGIN WHILE */ #else MX_LWIP_Init(); while (1) { MX_LWIP_Process(); /* USER CODE END WHILE */ /* USER CODE BEGIN 3 */ } #endif /* USER CODE END 3 */ } /** * @brief System Clock Configuration * @retval None */ void SystemClock_Config(void) { RCC_OscInitTypeDef RCC_OscInitStruct = {0}; RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; /** Supply configuration update enable */ HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY); /** Configure the main internal regulator output voltage */ __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0); while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {} /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; RCC_OscInitStruct.HSEState = RCC_HSE_ON; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; RCC_OscInitStruct.PLL.PLLM = 5; RCC_OscInitStruct.PLL.PLLN = 96; RCC_OscInitStruct.PLL.PLLP = 1; RCC_OscInitStruct.PLL.PLLQ = 4; RCC_OscInitStruct.PLL.PLLR = 2; RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_2; RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE; RCC_OscInitStruct.PLL.PLLFRACN = 0; if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { Error_Handler(); } /** Initializes the CPU, AHB and APB buses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2 |RCC_CLOCKTYPE_D3PCLK1|RCC_CLOCKTYPE_D1PCLK1; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1; RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2; RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2; RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2; RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2; RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2; if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK) { Error_Handler(); } } /** * @brief FDCAN1 Initialization Function * @param None * @retval None */ static void MX_FDCAN1_Init(void) { /* USER CODE BEGIN FDCAN1_Init 0 */ /* USER CODE END FDCAN1_Init 0 */ /* USER CODE BEGIN FDCAN1_Init 1 */ /* USER CODE END FDCAN1_Init 1 */ hfdcan1.Instance = FDCAN1; hfdcan1.Init.FrameFormat = FDCAN_FRAME_FD_BRS; hfdcan1.Init.Mode = FDCAN_MODE_NORMAL; hfdcan1.Init.AutoRetransmission = DISABLE; hfdcan1.Init.TransmitPause = DISABLE; hfdcan1.Init.ProtocolException = DISABLE; hfdcan1.Init.NominalPrescaler = 6; hfdcan1.Init.NominalSyncJumpWidth = 4; hfdcan1.Init.NominalTimeSeg1 = 29; hfdcan1.Init.NominalTimeSeg2 = 10; hfdcan1.Init.DataPrescaler = 4; hfdcan1.Init.DataSyncJumpWidth = 4; hfdcan1.Init.DataTimeSeg1 = 11; hfdcan1.Init.DataTimeSeg2 = 3; hfdcan1.Init.MessageRAMOffset = 0; hfdcan1.Init.StdFiltersNbr = 0; hfdcan1.Init.ExtFiltersNbr = 0; hfdcan1.Init.RxFifo0ElmtsNbr = 8; hfdcan1.Init.RxFifo0ElmtSize = FDCAN_DATA_BYTES_64; hfdcan1.Init.RxFifo1ElmtsNbr = 0; hfdcan1.Init.RxFifo1ElmtSize = FDCAN_DATA_BYTES_64; hfdcan1.Init.RxBuffersNbr = 0; hfdcan1.Init.RxBufferSize = FDCAN_DATA_BYTES_64; hfdcan1.Init.TxEventsNbr = 8; hfdcan1.Init.TxBuffersNbr = 0; hfdcan1.Init.TxFifoQueueElmtsNbr = 8; hfdcan1.Init.TxFifoQueueMode = FDCAN_TX_FIFO_OPERATION; hfdcan1.Init.TxElmtSize = FDCAN_DATA_BYTES_64; if (HAL_FDCAN_Init(&hfdcan1) != HAL_OK) { Error_Handler(); } /* USER CODE BEGIN FDCAN1_Init 2 */ /* USER CODE END FDCAN1_Init 2 */ } /** * @brief FDCAN2 Initialization Function * @param None * @retval None */ static void MX_FDCAN2_Init(void) { /* USER CODE BEGIN FDCAN2_Init 0 */ /* USER CODE END FDCAN2_Init 0 */ /* USER CODE BEGIN FDCAN2_Init 1 */ /* USER CODE END FDCAN2_Init 1 */ hfdcan2.Instance = FDCAN2; hfdcan2.Init.FrameFormat = FDCAN_FRAME_FD_BRS; hfdcan2.Init.Mode = FDCAN_MODE_NORMAL; hfdcan2.Init.AutoRetransmission = DISABLE; hfdcan2.Init.TransmitPause = DISABLE; hfdcan2.Init.ProtocolException = DISABLE; hfdcan2.Init.NominalPrescaler = 6; hfdcan2.Init.NominalSyncJumpWidth = 4; hfdcan2.Init.NominalTimeSeg1 = 29; hfdcan2.Init.NominalTimeSeg2 = 10; hfdcan2.Init.DataPrescaler = 4; hfdcan2.Init.DataSyncJumpWidth = 4; hfdcan2.Init.DataTimeSeg1 = 11; hfdcan2.Init.DataTimeSeg2 = 3; hfdcan2.Init.MessageRAMOffset = 512; hfdcan2.Init.StdFiltersNbr = 0; hfdcan2.Init.ExtFiltersNbr = 0; hfdcan2.Init.RxFifo0ElmtsNbr = 8; hfdcan2.Init.RxFifo0ElmtSize = FDCAN_DATA_BYTES_64; hfdcan2.Init.RxFifo1ElmtsNbr = 0; hfdcan2.Init.RxFifo1ElmtSize = FDCAN_DATA_BYTES_64; hfdcan2.Init.RxBuffersNbr = 0; hfdcan2.Init.RxBufferSize = FDCAN_DATA_BYTES_64; hfdcan2.Init.TxEventsNbr = 8; hfdcan2.Init.TxBuffersNbr = 0; hfdcan2.Init.TxFifoQueueElmtsNbr = 8; hfdcan2.Init.TxFifoQueueMode = FDCAN_TX_FIFO_OPERATION; hfdcan2.Init.TxElmtSize = FDCAN_DATA_BYTES_64; if (HAL_FDCAN_Init(&hfdcan2) != HAL_OK) { Error_Handler(); } /* USER CODE BEGIN FDCAN2_Init 2 */ /* USER CODE END FDCAN2_Init 2 */ } /** * @brief FDCAN3 Initialization Function * @param None * @retval None */ static void MX_FDCAN3_Init(void) { /* USER CODE BEGIN FDCAN3_Init 0 */ /* USER CODE END FDCAN3_Init 0 */ /* USER CODE BEGIN FDCAN3_Init 1 */ /* USER CODE END FDCAN3_Init 1 */ hfdcan3.Instance = FDCAN3; hfdcan3.Init.FrameFormat = FDCAN_FRAME_FD_BRS; hfdcan3.Init.Mode = FDCAN_MODE_NORMAL; hfdcan3.Init.AutoRetransmission = DISABLE; hfdcan3.Init.TransmitPause = DISABLE; hfdcan3.Init.ProtocolException = DISABLE; hfdcan3.Init.NominalPrescaler = 6; hfdcan3.Init.NominalSyncJumpWidth = 4; hfdcan3.Init.NominalTimeSeg1 = 29; hfdcan3.Init.NominalTimeSeg2 = 10; hfdcan3.Init.DataPrescaler = 4; hfdcan3.Init.DataSyncJumpWidth = 4; hfdcan3.Init.DataTimeSeg1 = 11; hfdcan3.Init.DataTimeSeg2 = 3; hfdcan3.Init.MessageRAMOffset = 1024; hfdcan3.Init.StdFiltersNbr = 0; hfdcan3.Init.ExtFiltersNbr = 0; hfdcan3.Init.RxFifo0ElmtsNbr = 8; hfdcan3.Init.RxFifo0ElmtSize = FDCAN_DATA_BYTES_64; hfdcan3.Init.RxFifo1ElmtsNbr = 0; hfdcan3.Init.RxFifo1ElmtSize = FDCAN_DATA_BYTES_64; hfdcan3.Init.RxBuffersNbr = 0; hfdcan3.Init.RxBufferSize = FDCAN_DATA_BYTES_64; hfdcan3.Init.TxEventsNbr = 8; hfdcan3.Init.TxBuffersNbr = 0; hfdcan3.Init.TxFifoQueueElmtsNbr = 8; hfdcan3.Init.TxFifoQueueMode = FDCAN_TX_FIFO_OPERATION; hfdcan3.Init.TxElmtSize = FDCAN_DATA_BYTES_64; if (HAL_FDCAN_Init(&hfdcan3) != HAL_OK) { Error_Handler(); } /* USER CODE BEGIN FDCAN3_Init 2 */ /* USER CODE END FDCAN3_Init 2 */ } /** * @brief SDMMC1 Initialization Function * @param None * @retval None */ static void MX_SDMMC1_SD_Init(void) { /* USER CODE BEGIN SDMMC1_Init 0 */ /* USER CODE END SDMMC1_Init 0 */ /* USER CODE BEGIN SDMMC1_Init 1 */ /* USER CODE END SDMMC1_Init 1 */ hsd1.Instance = SDMMC1; hsd1.Init.ClockEdge = SDMMC_CLOCK_EDGE_RISING; hsd1.Init.ClockPowerSave = SDMMC_CLOCK_POWER_SAVE_DISABLE; hsd1.Init.BusWide = SDMMC_BUS_WIDE_4B; hsd1.Init.HardwareFlowControl = SDMMC_HARDWARE_FLOW_CONTROL_ENABLE; hsd1.Init.ClockDiv = 1; /* USER CODE BEGIN SDMMC1_Init 2 */ /* USER CODE END SDMMC1_Init 2 */ } /** * @brief TIM3 Initialization Function * @param None * @retval None */ static void MX_TIM3_Init(void) { /* USER CODE BEGIN TIM3_Init 0 */ /* USER CODE END TIM3_Init 0 */ TIM_ClockConfigTypeDef sClockSourceConfig = {0}; TIM_MasterConfigTypeDef sMasterConfig = {0}; /* USER CODE BEGIN TIM3_Init 1 */ /* USER CODE END TIM3_Init 1 */ htim3.Instance = TIM3; htim3.Init.Prescaler = 119; htim3.Init.CounterMode = TIM_COUNTERMODE_UP; htim3.Init.Period = 65535; htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; if (HAL_TIM_Base_Init(&htim3) != HAL_OK) { Error_Handler(); } sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; if (HAL_TIM_ConfigClockSource(&htim3, &sClockSourceConfig) != HAL_OK) { Error_Handler(); } sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK) { Error_Handler(); } /* USER CODE BEGIN TIM3_Init 2 */ /* USER CODE END TIM3_Init 2 */ } /** * @brief UART4 Initialization Function * @param None * @retval None */ static void MX_UART4_Init(void) { /* USER CODE BEGIN UART4_Init 0 */ /* USER CODE END UART4_Init 0 */ /* USER CODE BEGIN UART4_Init 1 */ /* USER CODE END UART4_Init 1 */ huart4.Instance = UART4; huart4.Init.BaudRate = 9600; huart4.Init.WordLength = UART_WORDLENGTH_8B; huart4.Init.StopBits = UART_STOPBITS_1; huart4.Init.Parity = UART_PARITY_NONE; huart4.Init.Mode = UART_MODE_TX_RX; huart4.Init.HwFlowCtl = UART_HWCONTROL_NONE; huart4.Init.OverSampling = UART_OVERSAMPLING_16; huart4.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; huart4.Init.ClockPrescaler = UART_PRESCALER_DIV1; huart4.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; if (HAL_UART_Init(&huart4) != HAL_OK) { Error_Handler(); } if (HAL_UARTEx_SetTxFifoThreshold(&huart4, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK) { Error_Handler(); } if (HAL_UARTEx_SetRxFifoThreshold(&huart4, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK) { Error_Handler(); } if (HAL_UARTEx_DisableFifoMode(&huart4) != HAL_OK) { Error_Handler(); } /* USER CODE BEGIN UART4_Init 2 */ /* USER CODE END UART4_Init 2 */ } /** * @brief UART7 Initialization Function * @param None * @retval None */ static void MX_UART7_Init(void) { /* USER CODE BEGIN UART7_Init 0 */ /* USER CODE END UART7_Init 0 */ /* USER CODE BEGIN UART7_Init 1 */ /* USER CODE END UART7_Init 1 */ huart7.Instance = UART7; huart7.Init.BaudRate = 115200; huart7.Init.WordLength = UART_WORDLENGTH_8B; huart7.Init.StopBits = UART_STOPBITS_1; huart7.Init.Parity = UART_PARITY_NONE; huart7.Init.Mode = UART_MODE_TX_RX; huart7.Init.HwFlowCtl = UART_HWCONTROL_NONE; huart7.Init.OverSampling = UART_OVERSAMPLING_16; huart7.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; huart7.Init.ClockPrescaler = UART_PRESCALER_DIV1; huart7.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; if (HAL_UART_Init(&huart7) != HAL_OK) { Error_Handler(); } if (HAL_UARTEx_SetTxFifoThreshold(&huart7, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK) { Error_Handler(); } if (HAL_UARTEx_SetRxFifoThreshold(&huart7, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK) { Error_Handler(); } if (HAL_UARTEx_DisableFifoMode(&huart7) != HAL_OK) { Error_Handler(); } /* USER CODE BEGIN UART7_Init 2 */ /* USER CODE END UART7_Init 2 */ } /** * @brief UART8 Initialization Function * @param None * @retval None */ static void MX_UART8_Init(void) { /* USER CODE BEGIN UART8_Init 0 */ /* USER CODE END UART8_Init 0 */ /* USER CODE BEGIN UART8_Init 1 */ /* USER CODE END UART8_Init 1 */ huart8.Instance = UART8; huart8.Init.BaudRate = 115200; huart8.Init.WordLength = UART_WORDLENGTH_8B; huart8.Init.StopBits = UART_STOPBITS_1; huart8.Init.Parity = UART_PARITY_NONE; huart8.Init.Mode = UART_MODE_TX_RX; huart8.Init.HwFlowCtl = UART_HWCONTROL_NONE; huart8.Init.OverSampling = UART_OVERSAMPLING_16; huart8.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; huart8.Init.ClockPrescaler = UART_PRESCALER_DIV1; huart8.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; if (HAL_UART_Init(&huart8) != HAL_OK) { Error_Handler(); } if (HAL_UARTEx_SetTxFifoThreshold(&huart8, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK) { Error_Handler(); } if (HAL_UARTEx_SetRxFifoThreshold(&huart8, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK) { Error_Handler(); } if (HAL_UARTEx_DisableFifoMode(&huart8) != HAL_OK) { Error_Handler(); } /* USER CODE BEGIN UART8_Init 2 */ /* USER CODE END UART8_Init 2 */ } /** * Enable DMA controller clock */ static void MX_DMA_Init(void) { /* DMA controller clock enable */ __HAL_RCC_DMA1_CLK_ENABLE(); /* DMA interrupt init */ /* DMA1_Stream0_IRQn interrupt configuration */ HAL_NVIC_SetPriority(DMA1_Stream0_IRQn, 5, 0); HAL_NVIC_EnableIRQ(DMA1_Stream0_IRQn); } /** * Enable MDMA controller clock * Configure MDMA for global transfers * hmdma_mdma_channel0_sdmmc1_end_data_0 */ static void MX_MDMA_Init(void) { /* MDMA controller clock enable */ __HAL_RCC_MDMA_CLK_ENABLE(); /* Local variables */ /* Configure MDMA channel MDMA_Channel0 */ /* Configure MDMA request hmdma_mdma_channel0_sdmmc1_end_data_0 on MDMA_Channel0 */ hmdma_mdma_channel0_sdmmc1_end_data_0.Instance = MDMA_Channel0; hmdma_mdma_channel0_sdmmc1_end_data_0.Init.Request = MDMA_REQUEST_SDMMC1_END_DATA; hmdma_mdma_channel0_sdmmc1_end_data_0.Init.TransferTriggerMode = MDMA_BUFFER_TRANSFER; hmdma_mdma_channel0_sdmmc1_end_data_0.Init.Priority = MDMA_PRIORITY_LOW; hmdma_mdma_channel0_sdmmc1_end_data_0.Init.Endianness = MDMA_LITTLE_ENDIANNESS_PRESERVE; hmdma_mdma_channel0_sdmmc1_end_data_0.Init.SourceInc = MDMA_SRC_INC_BYTE; hmdma_mdma_channel0_sdmmc1_end_data_0.Init.DestinationInc = MDMA_DEST_INC_BYTE; hmdma_mdma_channel0_sdmmc1_end_data_0.Init.SourceDataSize = MDMA_SRC_DATASIZE_BYTE; hmdma_mdma_channel0_sdmmc1_end_data_0.Init.DestDataSize = MDMA_DEST_DATASIZE_BYTE; hmdma_mdma_channel0_sdmmc1_end_data_0.Init.DataAlignment = MDMA_DATAALIGN_PACKENABLE; hmdma_mdma_channel0_sdmmc1_end_data_0.Init.BufferTransferLength = 1; hmdma_mdma_channel0_sdmmc1_end_data_0.Init.SourceBurst = MDMA_SOURCE_BURST_SINGLE; hmdma_mdma_channel0_sdmmc1_end_data_0.Init.DestBurst = MDMA_DEST_BURST_SINGLE; hmdma_mdma_channel0_sdmmc1_end_data_0.Init.SourceBlockAddressOffset = 0; hmdma_mdma_channel0_sdmmc1_end_data_0.Init.DestBlockAddressOffset = 0; if (HAL_MDMA_Init(&hmdma_mdma_channel0_sdmmc1_end_data_0) != HAL_OK) { Error_Handler(); } /* Configure post request address and data masks */ if (HAL_MDMA_ConfigPostRequestMask(&hmdma_mdma_channel0_sdmmc1_end_data_0, 0, 0) != HAL_OK) { Error_Handler(); } /* MDMA interrupt initialization */ /* MDMA_IRQn interrupt configuration */ HAL_NVIC_SetPriority(MDMA_IRQn, 5, 0); HAL_NVIC_EnableIRQ(MDMA_IRQn); } /** * @brief GPIO Initialization Function * @param None * @retval None */ static void MX_GPIO_Init(void) { GPIO_InitTypeDef GPIO_InitStruct = {0}; /* USER CODE BEGIN MX_GPIO_Init_1 */ /* USER CODE END MX_GPIO_Init_1 */ /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOB_CLK_ENABLE(); __HAL_RCC_GPIOA_CLK_ENABLE(); __HAL_RCC_GPIOD_CLK_ENABLE(); __HAL_RCC_GPIOC_CLK_ENABLE(); __HAL_RCC_GPIOH_CLK_ENABLE(); __HAL_RCC_GPIOE_CLK_ENABLE(); /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(mLED_GPIO_Port, mLED_Pin, GPIO_PIN_RESET); /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOE, SD_LED_Pin|VIN_ON_Pin|PICO_EN_Pin, GPIO_PIN_RESET); /*Configure GPIO pin : mLED_Pin */ GPIO_InitStruct.Pin = mLED_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; HAL_GPIO_Init(mLED_GPIO_Port, &GPIO_InitStruct); /*Configure GPIO pins : SD_LED_Pin VIN_ON_Pin PICO_EN_Pin */ GPIO_InitStruct.Pin = SD_LED_Pin|VIN_ON_Pin|PICO_EN_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); /*Configure GPIO pin : sdDetect_Pin */ GPIO_InitStruct.Pin = sdDetect_Pin; GPIO_InitStruct.Mode = GPIO_MODE_INPUT; GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(sdDetect_GPIO_Port, &GPIO_InitStruct); /*Configure GPIO pins : VIN_IG_Pin VIN_1_4_Pin */ GPIO_InitStruct.Pin = VIN_IG_Pin|VIN_1_4_Pin; GPIO_InitStruct.Mode = GPIO_MODE_INPUT; GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); /* USER CODE BEGIN MX_GPIO_Init_2 */ /* USER CODE END MX_GPIO_Init_2 */ } /* USER CODE BEGIN 4 */ void lwftp_init(void) { IP4_ADDR(&s.cli_ip, CLI_IP[0], CLI_IP[1], CLI_IP[2], CLI_IP[3]); IP4_ADDR(&s.svr_ip, SVR_IP[0], SVR_IP[1], SVR_IP[2], SVR_IP[3]); s.svr_port = SVR_PORT; s.user = USER; s.pass = PASS; printf("\n>> lwftp: cli ip: %d.%d.%d.%d\r\n", CLI_IP[0], CLI_IP[1], CLI_IP[2], CLI_IP[3]); printf(">> lwftp: svr ip: %d.%d.%d.%d\r\n", SVR_IP[0], SVR_IP[1], SVR_IP[2], SVR_IP[3]); printf(">> lwftp: svr port: %d\r\n", s.svr_port); printf(">> lwftp: username: %s\r\n", s.user); printf(">> lwftp: password: %s\r\n\n", s.pass); #if FTPSemaphore sys_sem_new(&ftpsem, 0); // the semaphore would prevent simultaneous access to lwftp_send #endif /* Thread for Control connection*/ sys_thread_new("lwftp_ctrl_thread", lwftp_ctrl_thread, (void*) &s, DEFAULT_THREAD_STACKSIZE, osPriorityNormal); /* Thread for Data connection*/ sys_thread_new("lwftp_data_thread", lwftp_data_thread, (void*) &s, DEFAULT_THREAD_STACKSIZE, osPriorityNormal); } /* USER CODE END 4 */ /* USER CODE BEGIN Header_StartDefaultTask */ /** * @brief Function implementing the defaultTask thread. * @param argument: Not used * @retval None */ /* USER CODE END Header_StartDefaultTask */ void StartDefaultTask(void const * argument) { /* init code for LWIP */ MX_LWIP_Init(); /* USER CODE BEGIN 5 */ printf("[INFO] Remaining stack size of task: %ld\r\n", uxTaskGetStackHighWaterMark(NULL)); lwftp_init(); osDelay(5000); // run code aft 5s err_t err; // err = lwftp_list(&s); // err = lwftp_store(&s, "foobar.txt", "TESTTESTTESTTESTTESTTESTTEST\r\n"); err = lwftp_retrieve(&s, "ftp_test_1.txt"); printf("%d\r\n",err); /* Infinite loop */ for (;;) { osDelay(1); } /* USER CODE END 5 */ } /* USER CODE BEGIN Header_StartDebugTask */ /** * @brief Function implementing the debugTask thread. * @param argument: Not used * @retval None */ /* USER CODE END Header_StartDebugTask */ void StartDebugTask(void const * argument) { /* USER CODE BEGIN StartDebugTask */ /* Infinite loop */ for(;;) { osDelay(1); } /* USER CODE END StartDebugTask */ } /* MPU Configuration */ void MPU_Config(void) { MPU_Region_InitTypeDef MPU_InitStruct = {0}; /* Disables the MPU */ HAL_MPU_Disable(); /** Initializes and configures the Region and the memory to be protected */ MPU_InitStruct.Enable = MPU_REGION_ENABLE; MPU_InitStruct.Number = MPU_REGION_NUMBER0; MPU_InitStruct.BaseAddress = 0x0; MPU_InitStruct.Size = MPU_REGION_SIZE_4GB; MPU_InitStruct.SubRegionDisable = 0x87; MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0; MPU_InitStruct.AccessPermission = MPU_REGION_NO_ACCESS; MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_DISABLE; MPU_InitStruct.IsShareable = MPU_ACCESS_SHAREABLE; MPU_InitStruct.IsCacheable = MPU_ACCESS_NOT_CACHEABLE; MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE; HAL_MPU_ConfigRegion(&MPU_InitStruct); /** Initializes and configures the Region and the memory to be protected */ MPU_InitStruct.Number = MPU_REGION_NUMBER1; MPU_InitStruct.BaseAddress = 0x30000000; MPU_InitStruct.Size = MPU_REGION_SIZE_32KB; MPU_InitStruct.SubRegionDisable = 0x0; MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL1; MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS; MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE; HAL_MPU_ConfigRegion(&MPU_InitStruct); /** Initializes and configures the Region and the memory to be protected */ MPU_InitStruct.Number = MPU_REGION_NUMBER2; MPU_InitStruct.Size = MPU_REGION_SIZE_512B; MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0; MPU_InitStruct.IsShareable = MPU_ACCESS_SHAREABLE; MPU_InitStruct.IsBufferable = MPU_ACCESS_BUFFERABLE; HAL_MPU_ConfigRegion(&MPU_InitStruct); /** Initializes and configures the Region and the memory to be protected */ MPU_InitStruct.Number = MPU_REGION_NUMBER3; MPU_InitStruct.BaseAddress = 0x24000000; MPU_InitStruct.Size = MPU_REGION_SIZE_128KB; MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL1; MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_ENABLE; MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE; HAL_MPU_ConfigRegion(&MPU_InitStruct); /* Enables the MPU */ HAL_MPU_Enable(MPU_PRIVILEGED_DEFAULT); } /** * @brief Period elapsed callback in non blocking mode * @note This function is called when TIM6 interrupt took place, inside * HAL_TIM_IRQHandler(). It makes a direct call to HAL_IncTick() to increment * a global variable "uwTick" used as application time base. * @param htim : TIM handle * @retval None */ void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) { /* USER CODE BEGIN Callback 0 */ /* USER CODE END Callback 0 */ if (htim->Instance == TIM6) { HAL_IncTick(); } /* USER CODE BEGIN Callback 1 */ /* USER CODE END Callback 1 */ } /** * @brief This function is executed in case of error occurrence. * @retval None */ void Error_Handler(void) { /* USER CODE BEGIN Error_Handler_Debug */ /* User can add his own implementation to report the HAL error return state */ __disable_irq(); while (1) { } /* USER CODE END Error_Handler_Debug */ } #ifdef USE_FULL_ASSERT /** * @brief Reports the name of the source file and the source line number * where the assert_param error has occurred. * @param file: pointer to the source file name * @param line: assert_param error line source number * @retval None */ void assert_failed(uint8_t *file, uint32_t line) { /* USER CODE BEGIN 6 */ /* User can add his own implementation to report the file name and line number, ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ /* USER CODE END 6 */ } #endif /* USE_FULL_ASSERT */